The present invention relates to a semiconductor amplifier circuit and system including a cascode amplifier.
FIG. 3 illustrates an arrangement of a conventional semiconductor amplifier circuit 10. The semiconductor amplifier circuit 10 amplifies an input signal VIN input to an input terminal IN and outputs the result to an output terminal OUT as an output signal VOUT.
The semiconductor amplifier circuit 10 includes a transistor 101. The gate of the transistor 101 is connected to the input terminal IN. The source of the transistor 101 is grounded. The drain of the transistor 101 is connected to the output terminal OUT. The drain of the transistor 101 is supplied with a power supply voltage Vdd via a load ZL.
FIG. 5 illustrates the results of a simulation of the operation of the semiconductor amplifier circuit 10 shown in FIG. 3. Such a simulation is performed by using HSPICE, for example. The conditions for the simulation are as follows:
Transistor 101: nMOS transistor
Frequency f of input signal VIN: 1 kHz
Load ZL: resistor of 1000xcexa9
Output conductance gds of transistor 101: 1 mS
Transconductance gm of transistor 101: 24 mS
As shown in FIG. 5, through the semiconductor amplifier circuit 10, an output signal VOUT is obtained by amplifying the input signal VIN by a factor of 12 (=ZLxc3x97gm/2).
However, in the structure of the semiconductor amplifier circuit 10, the feedback capacitance Cgd appears to be increased by a factor of about 12 as compared to effective capacitance due to a Miller effect. Thus, a larger current flows from the input terminal IN to the output terminal OUT as the frequency of the input signal VIN increases.
FIG. 4 illustrates the structure of a conventional semiconductor amplifier circuit 20 for reducing the Miller effect.
The semiconductor amplifier circuit 20 includes a cascode amplifier 500. The cascode amplifier 500 includes the transistor 101 and a transistor 102 which are cascaded.
The gate of the transistor 101 is connected to an input terminal IN of the semiconductor amplifier circuit 20. The source of the transistor 101 is grounded. The drain of the transistor 101 is connected to the source of the transistor 102.
The gate of the transistor 102 is supplied with a fixed voltage Vb. The fixed voltage Vb is supplied from, for example, a DC power supply (not shown). A bypass capacitor C1 is provided for removing an AC component of the voltage Vb supplied from the DC power supply.
The source of the transistor 102 is connected to the drain of the transistor 101. The drain of the transistor 102 is connected to an output terminal OUT of the semiconductor amplifier circuit 20. The drain of the transistor 102 is supplied with the power supply voltage Vdd via the load ZL.
FIG. 6 illustrates the results of a simulation of a drain voltage V1 of the transistor 101 (i.e., a source voltage of the transistor 102). Due to the cascode arrangement in which the transistor 101 and the transistor 102 are cascaded, the amplitude of the voltage V1 is approximately equal to that of the input voltage VIN. Thus, there is no large current between the input terminal IN and the drain of the transistor 101. As a result, the Miller effect is reduced.
The above-described cascode arrangement also enables one to obtain a large amount of electric power as the output of the transistor amplifier circuit 20. This will be discussed below.
Generally, the maximum output power POUT of an amplifier is expressed by (Expression 1):
POUTxcx9c(gmxc2x7VIN)2/GOUTxe2x80x83xe2x80x83(Expression 1)
where gm represents a transconductance of the amplifier, VIN represents a voltage of an input signal input to the amplifier, and GOUT represents an output conductance of the amplifier.
As will be appreciated from (Expression 1), POUT is inversely proportional to GOUT.
As shown in FIG. 3, if the amplifier has a single transistor arrangement, GOUT=gds. Accordingly, by substituting GOUT=gds into (Expression 1), POUT=(gmxc2x7VIN)2/ gds holds. On the other hand, if the amplifier (i.e., the cascode amplifier 500) has a cascode arrangement as shown in FIG. 4, an approximation of GOUT=gds2/gm is possible in a band where the frequency of the input signal VIN is relatively low. Thus, by substituting GOUT=gds2/gm into (Expression 1), POUT=(gm/VIN)2xc2x7gm/gds2 holds in such a frequency band.
Thus, an amplifier having a cascode arrangement can obtain Pout which is greater than that of an amplifier having a single transistor arrangement by a factor of gm/gds. For example, in the case where gm=10 mS and gds=1 mS, an amplifier having the cascode arrangement may obtain an amount of energy which is ten times greater than an amplifier having a single transistor arrangement.
As described above, an amplifier having a cascode arrangement has advantages of reducing the Miller effect and reducing output conductance. Due to these advantages, an amplifier having a cascode arrangement has been widely used.
However, in the case where the frequency of the input signal VIN is 100 MHz or more, there may be a frequency band wherein the output conductance of the semiconductor amplifier circuit 20 is negative. This is because there may be a frequency band wherein the output conductance GOUT of the cascode amplifier 500 is negative.
In the following description, the output conductance GOUT of an amplifier being negative (i.e., GOUT less than 0 holds) will be referred to as xe2x80x9cthe output conductance GOUT of an amplifier having a negative characteristicxe2x80x9d.
FIG. 7 illustrates a structure of a small signal equivalent circuit of the cascode amplifier 500. In the example shown in FIG. 7, the transistor 101 and the transistor 102 are assumed to be NMOS transistors of the same size. It is also assumed that the gate of the transistor 102 is grounded via the capacitor C1 in order to reduce the Miller effect. The meanings of the symbols shown in FIG. 7 are as follows.
Cgs1: Gate-source capacitance of the transistor 101
Cgd1: Gate-drain capacitance of the transistor 101
gm1: Transconductance of the transistor 101
gds1: Output conductance of the transistor 101
Cds1: Drain-source capacitance of the transistor 101
Cdsub1: Drain-substrate capacitance of the transistor 101
Rsub1: Substrate resistance from drain to ground of the transistor 101
Cgs2: Gate-source capacitance of the transistor 102
Cgd2: Gate-drain capacitance of the transistor 102
gm2: Transconductance of the transistor 102
gds2: Output conductance of the transistor 102
Cds2: Drain-source capacitance of the transistor 102
Cdsub2: Drain-substrate capacitance of the transistor 102
Rsub2: Substrate resistance from drain to ground of the transistor 102
Assuming that Cds1=Cds2=0, the output conductance GOUT of the cascode amplifier 500 is expressed by (Expression 2), in which Re(X) represents a real number portion of X:
GOUT=Re(Y1 xc2x7Y2/(Y1+Y2+gM2))+Re(Y3)xe2x80x83xe2x80x83(Expression 2),
where Y1, Y2, and Y3 are represented by (Expression 3), (Expression 4), and (Expression 5), respectively:                                                                         Y                1                            =                              xe2x80x83                            ⁢                                                Y                  2                                +                                  Y                  3                                                                                                        =                              xe2x80x83                            ⁢                                                gds                  2                                +                                  j                  ⁢                                      xe2x80x83                                    ⁢                  ω                  ⁢                                      xe2x80x83                                    ⁢                                      C                    ds2                                                  +                                  j                  ⁢                                      xe2x80x83                                    ⁢                  ω                  ⁢                                      xe2x80x83                                    ⁢                                                            C                      dsub2                                        /                                          (                                              1                        +                                                  j                          ⁢                                                      xe2x80x83                                                    ⁢                          ω                          ⁢                                                      xe2x80x83                                                    ⁢                                                      C                            ds2                                                    ⁢                                                      R                            sub2                                                                                              )                                                                                                                              (                  Expression          ⁢                      xe2x80x83                    ⁢          3                )            xe2x80x83Y2=gds2+jxcfx89Cds2xe2x80x83xe2x80x83(Expression 4)
Y3=jxcfx89Cdsub2/ (1+jxcfx89Cds2Rsub2)xe2x80x83xe2x80x83(Expression 5)
where xcfx89=2xcfx80f. Symbol f represents a frequency of the input siganl VIN. Symbol j represents an imaginary unit.
FIG. 9 illustrates the results of a simulation of the output conductance GOUT characteristic of the cascode amplifier 500 of the semiconductor amplifier circuit 20. In FIG. 9, the horizontal axis represents the frequency of the input signal VIN and the vertical axis represents the output conductance GOUT of the cascode amplifier 500.
The conditions for the simulation are as follows:
Rsub1=Rsub2=10xcexa9
gds1=gds2=1.0 mS
Cds1=Cds2=0.5 pF
gm2=30 mS
Cdsub1=Cdsub2=0.5 pF
As will be appreciated from FIG. 9, in a frequency band near 3 GHz, the output conductance GOUT of the cascode amplifier 500 has a negative characteristic.
As shown in FIG. 9, in the case where the output conductance GOUT of the cascode amplifier has a negative characteristic, the operation of the amplifier circuit, including the cascode amplifier, becomes very unstable, whereby the amplifier circuit is likely to oscillate.
A conventional solution to the problem which is known in the art is to stabilize the operation of the amplifier circuit by providing a dumping circuit at the output of the cascode amplifier.
FIG. 10 illustrates a structure of a conventional semiconductor amplifier circuit 30 having a dumping resistor Rdump connected to the output of the cascode amplifier 500.
FIG. 11 illustrates the results of a simulation of the output conductance GOUT characteristic of the cascode amplifier 500 of the semiconductor amplifier circuit 30 for each of the dumping resistors Rdump having different values.
As will be appreciated from FIG. 11, in the case of Rdump less than 500xcexa9, the negative characteristic of the output conductance GOUT of the cascode amplifier 500 is eliminated for all frequencies. For example, in the case where the frequency f of the input signal VIN is 1 GHz, the output conductance GOUT is 1.6exe2x88x923(S).
However, inserting an actual resistor as a dumping resistor Rdump causes a voltage drop due to a DC current. For example, when a direct current of 5 mA flows into the dumping resistor Rdump of 500xcexa9, a voltage drop of 2.5 V results. In this case, if a power supply voltage Vdd of the cascode amplifier 500 is assumed to be 3 V, a voltage of only 0.5 V is applied to the transistors 101 and 102 included in the cascode amplifier 500. Under this condition, it is difficult for the semiconductor amplifier circuit 30 to operate normally. It is also difficult to operate the transistors 101 and 102 with a further reduced voltage.
Alternatively, the operation of the amplifier circuit may be stabilized by employing a low-pass filter using an inductor, a capacitor, and a resistor instead of the dumping resistor Rdump.
However, employing such a low-pass filter leads to an increase in the number of elements required for the amplifier circuit. Arranging a low-pass filter on an integrated circuit (IC) in order to reduce the number of elements causes a significant increase in chip area. Moreover, since it is very difficult to produce a device having a high Q factor on an IC, it is extremely difficult to realize such a filter.
The present invention solves the problems described above, and has an objective of providing a semiconductor amplifier circuit and system having a cascode amplifier wherein the negative characteristic of the output conductance is improved at least in a particular frequency band without causing a voltage drop or an increase in the number of elements.
A semiconductor amplifier circuit of the present invention comprises: a cascode amplifier having a first transistor and a second transistor which are cascaded: and improvement means for improving a negative characteristic of an output conductance of the cascode amplifier at least in a particular frequency band, thereby achieving the above-described object.
The particular frequency band may be a band of 100 MHz or more.
The improvement means may improve the negative characteristic of the output conductance of the cascode amplifier by reducing a real number portion of a gate-source voltage of the second transistor at least in the particular frequency band.
The improvement means may comprise an element which functions as a resistor at least in the particular frequency band, and a gate of the second transistor may be supplied with a predetermined voltage via the element.
The element may function as a resistor of 100xcexa9 or more at least in the particular frequency band.
The element may function as a resistor of 10 kxcexa9 or less at least in the particular frequency band. The semiconductor amplifier circuit may further comprise a high-pass filter connected to an output of the cascode amplifier.
The high-pass filter may be comprised of an inductor and a capacitor.
A system of the present invention may have a receiving section for receiving a signal and the receiving section may comprise the semiconductor amplifier circuit as a low-noise amplifier.
A system of the present invention may have a transmitting section for transmitting a signal and the transmitting section may comprise the semiconductor amplifier circuit as a power amplifier.